General Information
    • ISSN: 1793-8201 (Print), 2972-4511 (Online)
    • Abbreviated Title: Int. J. Comput. Theory Eng.
    • Frequency: Quarterly
    • DOI: 10.7763/IJCTE
    • Editor-in-Chief: Prof. Mehmet Sahinoglu
    • Associate Editor-in-Chief: Assoc. Prof. Alberto Arteta, Assoc. Prof. Engin Maşazade
    • Managing Editor: Ms. Cecilia Xie
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    • Average Days from Submission to Acceptance: 192 days
    • APC: 800 USD
    • E-mail: editor@ijcte.org
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IJCTE 2011 Vol.3(5): 697-700 ISSN: 1793-8201
DOI: 10.7763/IJCTE.2011.V3.394

A Novel Reversible Design of Unified Single Digit BCD Adder-Subtractor

V. Rajmohan, Member IACSIT, V. Renganathan, and M. Rajmohan

Abstract—Reversible quantum computer is the best choice for the future computer system. With the advent of quantum computer and reversible logic, design and implementation of all devices has received more attention. BCD digit adder is the basic unit of the more precise decimal computer arithmetic. Several proposals have been given for the BCD adders. This paper proposes a reversible implementation of 2:1 vector MUX and a combined BCD Adder / Subtractor. This paper can be extended to execute more complex operations using reversible logic.

Index Terms—BCD adder-subtractor, decimal arithmetic, reversible logic, quantum computer, low-power VLSI

V. Rajmohan was with Hindustan Institute of Technology & Science, Chennai. He is now with Loyola-ICAM College of Engineering & Technology, Chennai.
V. Ranganathan is with KCG College of Technology, Chennai.
M. Rajmohan is with Hindustan Institute of Technology & Science, Chennai.

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Cite: V. Rajmohan, V. Renganathan, and M. Rajmohan, "A Novel Reversible Design of Unified Single Digit BCD Adder-Subtractor," International Journal of Computer Theory and Engineering vol. 3, no. 5, pp. 697-700, 2011.


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