Abstract—MPSoCs are gaining popularity because of its potential to solve computationally expensive applications. MPSoCs frequently use two kinds of memories; on-chip SRAMs and off-chip DRAMs. Processors in multi-core systems usually take many clock cycles for the transfer of data to/from off-chip memories which affects the overall system performance. While on-chip memory operation takes one or two clock cycles, an off-chip memory access takes significantly more number of clock cycles. Memory access delays largely depend on the ways of memory allocation and array binding. In this paper, memory delay modeling for finding accurate delays and two effective techniques, memory allocation and slack time management, are proposed for memory access optimization of off-chip DRAMs.
Index Terms—Memory allocation, binding, scheduling, memory access optimization, memory management.
S. D. Khan is with the Computer Engineering Department, UmmAl-Qura University, Makkah, Saudi Arabia (e-mail: sgkhan@ uqu.edu.sa).
Cite: Sultan Daud Khan, "Effective Memory Access Optimization by Memory Delay Modeling, Memory Allocation, and Slack Time Management," International Journal of Computer Theory and Engineering vol. 4, no. 6, pp. 897-901, 2012.
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