doi: 10.7763/IJCTE.2012.V4.634
Very Low Cost Design and Implementation of Block Truncation Coding for Image Compression
Sajed Zadeh Dadashi
,
Sahar Zadeh Dadashi
- Department of Computer Engineering, Young Researchers Club, Roudsar and Amlash Branch, Islamic Azad University, Roudsar, Iran.
Abstract
One of image compression algorithms is block truncation coding that has lower efficiency in compare with some other algorithms, for example, JPEG and JPEG2000, but also has low cost and complexity and can be used in many applications. Many of image compression algorithms were implemented using FPGAs to work in fast digital systems. In this paper, BTC is implemented using some parallel microcontrollers that have acceptable speed and very low cost. AVR microcontroller has many applicable instructions, but has not the division instruction. Using the proposed division algorithm in this paper, this operation can be executed very fast.
Keywords
- BTC
- block average
- bit map
- AVR microcontrollers
- division
How to Cite
Sajed Zadeh Dadashi and Sahar Zadeh Dadashi, "Very Low Cost Design and Implementation of Block Truncation Coding for Image Compression," International Journal of Computer Theory and Engineering, vol. 4, no. 6, pp. 1039-1042, 2012. https://doi.org/10.7763/IJCTE.2012.V4.634
Copyright & License
Copyright © 2012 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).